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Nanotubes in Nanoelectronics and Sensor Technology

M. Meyyappan*

NASA Ames Research Center
M/S 229-3, Moffett Field, CA 94035 USA

This is an abstract for a presentation given at the
Seventh Foresight Conference on Molecular Nanotechnology.
There will be a link from here to the full article when it is available on the web.

 

The semiconductor industry association roadmap projects 70 nm feature size CMOS by the year 2007. However, several fabrication challenges - viable lithography, interconnects, and several manufacturing related issues - need to be addressed to realize this goal on time; vigorous efforts are in progress in laboratories across the world to address these issues. The research community is also engaged in developing device concepts, circuits and architectures for beyond-the-roadmap era which would truly lead into the nanoelectronics era. Candidate technologies receiving attention include various quantum functional devices, quantum computing, DNA computing, and molecular electronics. This talk would provide an overview on one such candidate technology based on carbon and other nanotubes.

Carbon nanotube (CNT) has created excitement among the research community in the last few years and few demonstrations of BN and other nanotubes have also been reported. Preliminary experiments and extensive theoretical work show high electrical and thermal conductivities and mechanical strength for CNT. Electrical properties can be changed from metallic to semiconducting by varying the helicity. All these properties in combination with ultrasmall size make CNT a promising candidate as a future electronic material. Conceptually, CNT-based devices could be fabricated by changing the helicity along a nanotube, coupling of nanotubes with different helicity, introduction of deformations to control the electronic properties etc. The challenges include controlled growth on patterns, control of helicity and defects, design of novel circuits and architectures (instead of mimicking CMOS-like and other existing architectures). The key metrics will be low cost (less than 1x10-5 cent/transistor), high level of integration (109 transistors/circuit), high reproducibility, and reliability.

In addition to being an electronic material on its own right for future nanoelectronics, CNT has many remarkable attributes which can lead to a key role in the future of silicon technology. The high aspect ratio of nanotube tips provides opportunities to develop probes for metrology. Nanotube as an etching tool, low resistivity interconnects, and low-dielectric constant insulator are also possibilities. A brief discussion on the potential and progress to date on field emitters and biosensors will also be presented.

The author acknowledges M. Anantram, Alan Cassell, F. Dzegilenko, J. Han, R. Jaffe, D. Srivastava, T. Yamada, L. Yang, and Profess Hongjie Dai.


*Corresponding Address:
M. Meyyappan
NASA Ames Research Center
M/S 229-3, Moffett Field, CA 94035 USA
Phone: (650) 604-2616; FAX: (650) 604-5244
email: meyya@orbit.arc.nasa.gov; web: http://www.ipt.arc.nasa.gov



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