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Laying pure nanotubes in square grids

from the square-one-for-nanotube-chips? dept.
IBM grows nanotube patterns on silicon wafers, a September 30 EETimes article reported that IBM has grown catalyst-free nanotube networks on silicon carbide substrates, producing "grids of nanotubes (in rows and columns), bringing the promise of nanotube transistors arrayed across silicon chips one step closer to reality". The carbon nanotubes were produced by an IBM-patented process that uses no metal catalyst, and thus produces purer nanotubes without metal contamination.

"We have shown that pure, catalyst-free nanotubes that follow the atomic structure of a surface can be grown," said Phaedon Avouris, manager of nanoscale science at IBM Research. "Using atomic-force microscopy, we also showed that at high temperatures they can be moved on the surface, and that [when they cool] they become stabilized in directions that are parallel and perpendicular to the [wafer's patterned] step edges.

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