Some nanostructures can be improved after fabrication by a new nanotech procedure that transiently and selectively liquifies the structures to remove defects. From “Self-perfection in nanomanufacturing“, a Nanowerk Spotlight written by Michael Berger:
…Rather than perfecting a nanostructure by improving its original fabrication method, researchers at Princeton University have demonstrated a new method, known as self-perfection by liquefaction (SPEL), which removes nanostructure fabrication defects and improves nanostructures after fabrication.
“When feature sizes in a device are small enough, the fabrication defects in many nanofabrication methods can become a dominant factor that determines the actual shape of the nanostructure” Dr. Stephen Y. Chou explains to Nanowerk. “Although extrinsic defects can be removed by improving the process, intrinsic defects caused by the fundamental statistical nature of a fabrication process — for example, noise in photon, electron or ion generation, scattering, and variations in chemical reaction — cannot be removed within the process regardless of improvements to it. The minimum line width and line height are often determined by the fundamental working principle of a fabrication, and are fixed once a fabrication method is selected.”
“Our process removes defects after fabrication rather than in the fabrication. As structures become very small, conventional fabrications will be limited by intrinsic noise, and improving the fabrication technology becomes fruitless.”
Chou, the Joseph C. Elgin Professor of Engineering at Princeton University and head of the university’s Nanostructures Laboratory, developed the method along with graduate student Qiangfei Xia. Chou’s lab has previously pioneered a number of innovative chip making techniques, including a revolutionary method for imprinting of nanopatterns on wafers. The scientists published their method in the May 4 online issue of Nature Nanotechnology (“Improved nanofabrication through guided transient liquefaction“), showing a technique that could lead to more precise shaping of microchip components beyond the current technology limits, potentially allowing them to be smaller, better and more powerful computers and other devices.
“SPEL is a paradigm shift in nanofabrication,” says Chou. “We are able achieve a precision far beyond what was previously thought possible (e.g. ITRS – The International Technology Roadmap for Semiconductors). Using this method we reduced the line-edge roughness of 70-nm-wide chromium grating lines from 8.4 nm to less than 1.5 nm, which is well below the ‘red-zone limit’ of 3 nm discussed in ITRS. We also reduced the width of a silicon line from 285 nm to 175 nm, while increasing its height from 50 nm to 90 nm.”