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Another nanotechnology computer memory breakthrough from Feynman Prize winner

A schematic shows the layered structure of tantalum oxide, multilayer graphene and platinum used for a new type of memory developed at Rice University. The memory device overcomes crosstalk problems that cause read errors in other devices. (Credit: Tour Group/Rice University)

One prominent area in which nanoscale science and technology is providing a rich pipeline feeding current and near-term improvements in technology is computer hardware, and in particular, solid-state computer memories. One year ago, we cited a breakthrough nanoporous silicon oxide technology for resistive random-access memory (RRAM) developed by the research group of James Tour, winner of the 2008 Foresight Institute Feynman Prize in the Experimental category. Now he appears to have topped this memory architecture with another memory breakthrough. A hat tip to KurzweilAI for reporting this Rice University news release “Tantalizing discovery may boost memory technology“:

Scientists at Rice University have created a solid-state memory technology that allows for high-density storage with a minimum incidence of computer errors.

The memories are based on tantalum oxide, a common insulator in electronics. Applying voltage to a 250-nanometer-thick sandwich of graphene, tantalum, nanoporous tantalum oxide and platinum creates addressable bits where the layers meet. Control voltages that shift oxygen ions and vacancies switch the bits between ones and zeroes.

The discovery by the Rice lab of chemist James Tour could allow for crossbar array memories that store up to 162 gigabits, much higher than other oxide-based memory systems under investigation by scientists. (Eight bits equal one byte; a 162-gigabit unit would store about 20 gigabytes of information.)

Details appear online in the American Chemical Society journal Nano Letters [abstract].

Like the Tour lab’s previous discovery of silicon oxide memories, the new devices require only two electrodes per circuit, making them simpler than present-day flash memories that use three. “But this is a new way to make ultradense, nonvolatile computer memory,” Tour said.

Nonvolatile memories hold their data even when the power is off, unlike volatile random-access computer memories that lose their contents when the machine is shut down.

Modern memory chips have many requirements: They have to read and write data at high speed and hold as much as possible. They must also be durable and show good retention of that data while using minimal power.

Tour said Rice’s new design, which requires 100 times less energy than present devices, has the potential to hit all the marks.

“This tantalum memory is based on two-terminal systems, so it’s all set for 3-D memory stacks,” he said. “And it doesn’t even need diodes or selectors, making it one of the easiest ultradense memories to construct. This will be a real competitor for the growing memory demands in high-definition video storage and server arrays.”

The layered structure consists of tantalum, nanoporous tantalum oxide and multilayer graphene between two platinum electrodes. In making the material, the researchers found the tantalum oxide gradually loses oxygen ions, changing from an oxygen-rich, nanoporous semiconductor at the top to oxygen-poor at the bottom. Where the oxygen disappears completely, it becomes pure tantalum, a metal.

The researchers determined three related factors give the memories their unique switching ability.

First, the control voltage mediates how electrons pass through a boundary that can flip from an ohmic (current flows in both directions) to a Schottky (current flows one way) contact and back.

Second, the boundary’s location can change based on oxygen vacancies. These are “holes” in atomic arrays where oxygen ions should exist, but don’t. The voltage-controlled movement of oxygen vacancies shifts the boundary from the tantalum/tantalum oxide interface to the tantalum oxide/graphene interface. “The exchange of contact barriers causes the bipolar switching,” said Gunuk Wang, lead author of the study and a former postdoctoral researcher at Rice.

Third, the flow of current draws oxygen ions from the tantalum oxide nanopores and stabilizes them. These negatively charged ions produce an electric field that effectively serves as a diode to hinder error-causing crosstalk. While researchers already knew the potential value of tantalum oxide for memories, such arrays have been limited to about a kilobyte because denser memories suffer from crosstalk that allows bits to be misread.

The graphene does double duty as a barrier that keeps platinum from migrating into the tantalum oxide and causing a short circuit.

Tour said tantalum oxide memories can be fabricated at room temperature. He noted the control voltage that writes and rewrites the bits is adjustable, which allows a wide range of switching characteristics.

Wang said the remaining hurdles to commercialization include the fabrication of a dense enough crossbar device to address individual bits and a way to control the size of the nanopores.

Improvements in computer memory can be expected to have far-reaching effects on all areas of science and technology, especially by facilitating and extending the application of big data and data science in areas from genomic research to clinical medicine to increasingly general artificial intelligence applications. As incremental advances in nanotechnology provide increasingly fine control over the structure of matter at the nanometer scale, they point toward the even greater advances that will occur once high-throughput atomically precise manufacturing becomes available.
—James Lewis, PhD

One Response to “Another nanotechnology computer memory breakthrough from Feynman Prize winner”

  1. John Darnell Says:

    Fascinating article with exciting prospects for future computing. The none detail that is missing, and that would make this article complete is an estimate of how long it will be before the new memory technology will be affordable and available to the general public. As a senior software developer it does me no good to be told that a new memory scheme is in the works if the actual deployment date is January 2050, no matter how dense, or power saving the new tech is. And neither is it useful for me if only large companies and big government will be able to afford such sophisticated memory tech.

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